In The News

December 29, 2011: Low Power Clock Architecture divisional patent application number US-2011-0316602-A1 is published at the USPTO.

October 18, 2011: Low Power Clock Architecture Patent (8,040,155) awarded to East-West Innovation (EWI) by the USPTO. The technology outlined in the patent demonstrates methodologies that can significantly reduce integrated-circuit dynamic peak power by up to 72%.

June 30, 2011: InnovaClockControl tool-flow Phase 2 USF Department of Computer Science and Engineering sponsored research successfully completed.

June 20, 2011: IEEE Transactions on VLSI Systems Manuscript submitted to the editor, titled, A Clock Control Strategy for Peak Power Reduction Using Path Clustering.

April 25, 2011: Ransford Hyman, University of South Florida Computer Science Doctoral Candidate, receives this year's Student Research Poster Competition's Best Poster Award for research of EWI's power reduction technology. EWI's patent pending technology, InnovaClockControlTM, minimizes peak power consumption of dynamic logic within IC's. The student research competition, co-sponsored by the Association of computing Machinery in conjunction with the Computing Research Association and the IEEE Computer Society, assembled a group of over 175 students from diverse universities from both North America and South America.

For additional details on the poster award, go to http://www.eng.usf.edu/about/news/04-25-2011 Student Receives Best Poster Award.pdf

September 04, 2010: InnovaClockControl achieves breakthrough performance. Sponsored research at University of South Florida (USF) shows significant IC power reduction. Prof. Ranganathan, USF's Distinguished Professor, receives additional funding from the Florida High Tech Corridor to move forward with InnovaClockControl research. An additional $42,000 grant from the Florida High Tech Corridor will allow Prof. Ranganathan to continue research of East-West Innovation's patent-pending Innovaclockcontrol technology. Further details of Prof. Ranganathan's VLSI research can be found at the USF Department of Computer Science and Engineering website.

February 12, 2010: East-West Innovation Corporation receives private-funded growth capital for further development of its InnovaClockControl technology and related operations. The company’s InnovaClockControl technology is undergoing patent prosecution with the USPTO and PCT in addition to benchmark performance simulations at the University of South Florida, Department of Computer Science and Engineering.

January 25, 2010: University of South Florida, Department of Computer Science & Engineering, receives a second-round Matching Grant Funding from the Florida High Tech Corridor to continue research on  InnovaClockControl. The University has been funded by East-West Innovation (EWI) to benchmark EWI's low-power IC clock architecture against existing technologies at the 45nm node. With the matching grant, The University will be able to accelerate the research to determine the feasibility of InnovaClockControl as a power reduction solution.

December 12, 2009: Florida High Tech Corridor Matching Grant Funding Awarded to The University of South Florida, Department of Computer Science & Engineering to support East-West Innovation low power IC research and development. Additional information on the sponsored research can be found at the link below:

http://www.cse.usf.edu/news/prof_ranganathan_grant_east-west_innovation_corp

November 30, 2009: East-West Innovation signs market research contract with StarTEC to accelerate research and development of its low power IC architecture.